1. Field of the Invention
This invention relates to a digital logic, level conversion circuit, and more particularly a digital logic level conversion circuit with a small sinusoidal wave input for converting a level of signal in order to use a sinusoidal wave with a small amplitude of several hundreds mV as a source of clock of an internal digital circuit.
2. Description of the Prior Art
Typically, a majority of circuit of late is possible to be integrated highly and has been replaced with an economical and reliable digital logic circuit. This trend is matched to customer's taste. In other words, a purchase desire of general customer can be raised through a miniature of size and a lightness of weight.
Therefore, a single chip of a high degree of integration has a remarkable tendency to incorporate a variety of function compoundly.
As a result, a circuit for converting a sinusoidal input with a small amplitude into a digital level can be designed very variously. For example, there is a method to amplify a signal with a small amplitude using an amplifier and then increase a noise margin by use of a schmitt trigger circuit and other circuits. In the method, however, a center potential is changed due to a perturbation of an offset potential when an outputted digital signal is amplified and the variation of a duty ratio of a source of digital clock outputted by hysteresis of a locked schmitt trigger circuit is very large.
Using this digital signal in general as a source of clock of a circuit causes a problem. Particulary, the clock used in a comparator such as a mixer circuit or an analog to digital (A/D) converter must be a clock with a duty ratio of just 50%.
In view of the foregoing problem, it is therfore an object of this invention to provide a signal conversion circuit which generates successively a digital signal with a duty ratio of just 50% and is not susceptible to a variation of semiconductor process, in other words, a digital logic level conversion circuit with a small sinusoidal input, as a circuit for converting a level of signal to use a sinusoidal wave with a small amplitude of several hundreds mV as a source of clock of an internal digital circuit, which allows the generated digital output to have an exact duty ratio of 50%.